The Indian Institute of Science (IISc) and Samsung Semiconductor India Research (SSIR) have announced a collaboration to advance research and development in the area of on-chip Electrostatic Discharge (ESD) Protection. Balajee Sowrirajan, CVP and MD, SSIR, Bengaluru, and Govindan Rangarajan, Director, IISc, exchanged the research agreement.
The alliance aims to develop cutting-edge ESD device solutions to safeguard ultra-high-speed serial interfaces in sophisticated Integrated Circuits (ICs) and system-on-chip (SoC) products, according to an official announcement. A group led by Mayank Shrivastava from the Department of Electronic Systems Engineering (DESE), IISc, will conduct the relevant study. The research’s findings will be implemented in Samsung’s advanced process nodes. The release stated.
“Our collaboration with IISc will promote semiconductor innovation and advance knowledge of ESD. Our objective is to boost capacity building through postgraduate training programmes, provide students with the opportunity to complete industry internships, and support young researchers’ entrepreneurial endeavours, according to Sowrirajan.
The announcement also noted that ICs and SoCs have shown tremendous market growth. ESD failures are to blame for the bulk of IC chip failures and field returns. ESD technology research and development is crucial for extremely dependable interfaces and SoCs.
